F75113
Enable GPIO42 input de-bounce with 10u (Maximum, when
input signal and detected clock is synchronicity) or 25ms
(Maximum, when input signal and detected clock is
synchronicity) second that selected by 7Ch bit2.
2
1
0
GP42_ ENDB
GP41_ ENDB
GP40_ ENDB
R/W
R/W
R/W
0
0
0
Enable GPIO41 input de-bounce with 10u (Maximum, when
input signal and detected clock is synchronicity) or 25ms
(Maximum, when input signal and detected clock is
synchronicity) second that selected by 7Ch bit1.
Enable GPIO40 input de-bounce with 10u (Maximum, when
input signal and detected clock is synchronicity) or 25ms
(Maximum, when input signal and detected clock is
synchronicity) second that selected by 7Ch bit0.
8.2.38 GPIO4X Pin Inverse Enable Register ⎯ Index77h
Bit
Name
R/W Default
Description
If the GPIO47 pin inverse was selected, the output signal would
be inversed.
7
GP47_ PINV
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
If the GPIO46 pin inverse was selected, the output signal would
be inversed.
6
5
4
3
2
1
0
GP46_ PINV
GP45_ PINV
GP44_ PINV
GP43_ PINV
GP42_ PINV
GP41_ PINV
GP40_ PINV
If the GPIO45 pin inverse was selected, the output signal would
be inversed.
If the GPIO44 pin inverse was selected, the output signal would
be inversed.
If the GPIO43 pin inverse was selected, the output signal would
be inversed.
If the GPIO42 pin inverse was selected, the output signal would
be inversed.
If the GPIO41 pin inverse was selected, the output signal would
be inversed.
If the GPIO40 pin inverse was selected, the output signal would
be inversed.
- 71 -
Dec,2011
V0.13P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
