F75113
8.2.39 GPIO4X Edge Detector Enable Register ⎯ Index 78h
Name R/W Default Description
Bit
Enable GPIO47 Edge Detector. If this bit set to 1 and GPIO47
set to input mode (70h) will enable GPIO47 edge detection.
Default is disabled.
7
EN_GP47EDGE R/W
EN_GP46EDGE R/W
EN_GP45EDGE R/W
EN_GP44EDGE R/W
EN_GP43EDGE R/W
EN_GP42EDGE R/W
EN_GP41EDGE R/W
EN_GP40EDGE R/W
0
0
0
0
0
0
0
0
Enable GPIO46 Edge Detector. If this bit set to 1 and GPIO46
set to input mode (70h) will enable GPIO36 edge detection.
Default is disabled.
6
5
4
3
2
1
0
Enable GPIO45 Edge Detector. If this bit set to 1 and GPIO45
set to input mode (70h) will enable GPIO35 edge detection.
Default is disabled.
Enable GPIO44 Edge Detector. If this bit set to 1 and GPIO44
set to input mode (70h) will enable GPIO34 edge detection.
Default is disabled.
Enable GPIO43 Edge Detector. If this bit set to 1 and GPIO43
set to input mode (70h) will enable GPIO33 edge detection.
Default is disabled.
Enable GPIO42 Edge Detector. If this bit set to 1 and GPIO42
set to input mode (70h) will enable GPIO32 edge detection.
Default is disabled.
Enable GPIO41 Edge Detector. If this bit set to 1 and GPIO41
set to input mode (70h) will enable GPIO31 edge detection.
Default is disabled.
Enable GPIO40 Edge Detector. If this bit set to 1 and GPIO40
set to input mode (70h) will enable GPIO30 edge detection.
Default is disabled.
8.2.40 GPIO4X Edge Detector Status Register ⎯ Index 79h
Bit
Name
R/W Default
Description
Indicate GPIO47 Edge Status. If set to 1, the edge of GPIO47
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
7
STS_GP47EDGE
R
R
-
-
Indicate GPIO46 Edge Status. If set to 1, the edge of GPIO46
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
6
STS_GP46EDGE
- 72 -
Dec,2011
V0.13P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
