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F71872FG 参数 Datasheet PDF下载

F71872FG图片预览
型号: F71872FG
PDF下载: 下载PDF文件 查看货源
内容描述: 超级H / W监控+ LPC IO [Super H/W Monitor + LPC IO]
分类和应用: 监控PC
文件页数/大小: 115 页 / 3055 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71872  
RS485 Enable Register Index F0h  
Bit  
Name  
R/W Default  
Description  
7-5 Reserved  
-
-
Reserved.  
4
3
2
RS485_EN  
RXW4C_IR  
TXW4C_IR  
R/W  
0
0: RS232 driver.  
1: RS485 driver. Auto drive RTS# low when transmitting data.  
0: No reception delay when SIR is changed form TX to RX.  
R/W  
R/W  
-
0
0
-
1: Reception delays 4 characters time when SIR is changed form TX to RX.  
0: No transmission delay when SIR is changed form RX to TX.  
1: Transmission delays 4 characters time when SIR is changed form RX to TX.  
1-0 Reserved  
Reserved.  
SIR Mode Control Register Index F1h  
Bit  
Name  
Reserved  
R/W Default  
Description  
7
6
5
-
-
-
Reserved.  
Reserved.  
Reserved.  
Reserved  
Reserved  
-
-
-
4-3 IRMODE  
R/W  
00  
00: disable IR function.  
01: disable IR function.  
10: IrDA function, active pulse is 1.6uS.  
11: IrDA function, active pulse is 3/16 bit time.  
2
HDUPLX  
R/W  
1
0: SIR is in full duplex mode for loopbak test. TXW4C_IR and RXW4C_IR are  
of no use.  
1: SIR is in half duplex mode.  
1
0
TXINV_IR  
RXINV_IR  
R/W  
R/W  
0
0
0: IRTX is in normal condition.  
1: inverse the IRTX.  
0: IRRX is in normal condition.  
1: inverse the IRRX.  
7.4.3 Device Registers  
7.4.3.1 Receiver Buffer Register Base + 0  
Bit  
Name  
R/W Default  
Description  
58  
July, 2007  
V0.28P  
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