F71872
Base Address High Register Index 60h
Bit
Name
R/W Default
Description
Description
Description
7-0 BASE_ADDR_HI
R/W 03h The MSB of UART 1 base address.
Base Address Low Register Index 61h
Bit
Name
R/W Default
R/W F8h The LSB of UART 1 base address.
7-0 BASE_ADDR_LO
IRQ Channel Select Register Index 70h
Bit
Name
R/W Default
7-4 Reserved
-
-
Reserved.
Select the IRQ channel for UART 1.
3-0 SELUR1IRQ
R/W
4h
RS485 Enable Register Index F0h
Bit
Name
R/W Default
Description
7-5 Reserved
RS485_EN
-
-
Reserved.
4
R/W
0
0: RS232 driver.
1: RS485 driver. Auto drive RTS# low when transmitting data.
Reserved.
3-0 Reserved
-
-
7.3.3 Device Registers
7.3.3.1 Receiver Buffer Register Base + 0
Bit
Name
R/W Default
Description
Description
The data received.
Read only when LCR[7] is 0
7-0 RBR
R
00h
7.3.3.2 Transmitter Holding Register Base + 0
Bit
Name
R/W Default
Data to be transmitted.
Write only when LCR[7] is 0
7-0 THR
W
00h
53
July, 2007
V0.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
