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F71862 参数 Datasheet PDF下载

F71862图片预览
型号: F71862
PDF下载: 下载PDF文件 查看货源
内容描述: 超级硬件监控+ LPC I / O [Super Hardware Monitor + LPC I/O]
分类和应用: 监控PC
文件页数/大小: 110 页 / 837 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F71862  
2
1
0
INIT_N  
AFD  
R/W  
R/W  
R/W  
0
0
0
Drives the parallel port signal INIT#.  
When read, the status of INIT# is return.  
Inverted and then drives the parallel port signal AFD#.  
When read, the status of inverted AFD# is return.  
STB  
Inverted and then drives the parallel port signal STB#.  
When read, the status of inverted STB# is return.  
EPP Address Register Base + 3  
Bit Name R/W Default  
7-0 EPP_ADDR  
Description  
Write this register will cause the hardware to auto transmit the written data to  
the device with the EPP Address Write protocol.  
R/W  
00h  
Read this register will cause the hardware to auto receive data from the device  
by with the EPP Address Read protocol.  
EPP Data Register Base + 4 – Base + 7  
Bit Name R/W Default  
7-0 EPP_DATA  
Description  
Write this register will cause the hardware to auto transmit the written data to  
the device with the EPP Data Write protocol.  
R/W  
00h  
Read this register will cause the hardware to auto receive data from the device  
by with the EPP Data Read protocol.  
Parallel Port Data FIFO Base + 400h  
Bit  
Name  
R/W Default  
R/W  
Description  
7-0 C_FIFO  
00h Data written to this FIFO is auto transmitted by the hardware to the device by  
using standard parallel port protocol.  
It is only valid in ECP and the ECP_MODE is 010b.The operation is only for  
forward direction.  
ECP Data FIFO Base + 400h  
Bit Name R/W Default  
7-0 ECP_DFIFO R/W  
Description  
00h Data written to this FIFO when DIR is 0 is auto transmitted by the hardware to  
the device by using ECP parallel port protocol.  
Data is auto read from device into the FIFO when DIR is 1 by the hardware by  
using ECP parallel port protocol. Read the FIFO will return the content to the  
system.  
It is only valid in ECP and the ECP_MODE is 011b.  
ECP Test FIFO Base + 400h  
Bit  
Name  
R/W Default  
R/W  
Description  
7-0 T_FIFO  
00h Data may be read, written from system to the FIFO in any Direction. But no  
hardware handshake occurred on the parallel port lines. It could be used to test  
the empty, full and threshold of the FIFO.  
It is only valid in ECP and the ECP_MODE is 110b.  
37  
July, 2008  
V.28P  
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