F71862
0: Transmitter Holding Register is not empty.
1: Transmitter Holding Register is empty.
0: No break condition detected.
1: A break condition is detected.
0: Data received has no frame error.
1: Data received has frame error.
0: Data received has no parity error.
1: Data received has parity error.
0: No overrun condition occurred.
1: An overrun condition occurred.
0: No data is ready for read.
5
4
3
2
1
0
THRE
BI
R
R
R
R
R
R
1
0
0
0
0
0
FE
PE
OE
DR
1: Data is received.
MODEM Status Register Base + 6
Bit
Name
R/W Default
Description
Complement of DCD# input. In loop back mode, this bit is equivalent to OUT2
7
DCD
RI
R
R
R
R
R
R
R
R
-
in MCR.
Complement of RI# input. In loop back mode , this bit is equivalent to OUT1 in
MCR
Complement of DSR# input. In loop back mode , this bit is equivalent to DTR in
MCR
Complement of CTS# input. In loop back mode , this bit is equivalent to RTS in
MCR
0: No state changed at DCD#.
1: State changed at DCD#.
0: No Trailing edge at RI#.
1: A low to high transition at RI#.
0: No state changed at DSR#.
1: State changed at DSR#.
0: No state changed at CTS#.
1: State changed at CTS#.
6
5
4
3
2
1
0
-
DSR
CTS
-
-
DDCD
TERI
DDSR
DCTS
0
0
0
0
Scratch Register Base + 7
Bit
Name
R/W Default
Description
Scratch register.
7-0 SCR
R/W
00h
7.4 Parallel Port
The parallel port in F71862 supports an IBM XT/AT compatible parallel port ( SPP ),
bi-directional paralle port ( BPP ), Enhanced Parallel Port ( EPP ), Extended Capabilities
Parallel Port ( ECP ) mode. Refer to the configuration registers for more information on
selecting the mode of operation.
The below content is about the Parallel Port device register descriptions. All the
registers are for software porting reference.
35
July, 2008
V.28P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
