MC81F4432
19.4 Timer 2 16-Bit Mode
T2CS
T2OVIE
fxx/1024
fxx/256
fxx/64
fxx/16
fxx/8
Timer 2 overflow INT enable
Data BUS
8
OVF
T2OVIR
T2 Overflow
Interrupt
Timer 2 Overflow INT request
M
U
X
T3CR
T2CR
fxx/4
fxx/2
fxx/1
fxt
T2OF
16-Bit Up Counter
(Read - only)
Clear
T2CC
Match signal
R
Clear
T2MIE
Timer 2 INT enable
EC2
Counter stop
Match
16-Bit Comparator
T2MIR
T2 Match
Interrupt
Timer 2 Match INT request
T2O
M
U
X
T2MIF
EXT5
Timer 2 Buffer Register
T2CC
Overflow signal
Match signal
EINT0H
MSB
LSB
Timer 2 Data Register
T3DR
T2DR
EXT5
8
Interrupt
Timer 2 (16bit)
Timer 3 + Timer 2
Data BUS
Figure 19-3 16-bit Timer 2 Block Diagram
The 16-bit timer 2 is a 16-bit general-purpose timer. Timer 2 has two operating modes, you can select
one of them using the appropriate T2SCR setting:
- Interval timer mode (Toggle output at T2O pin)
- Capture input mode with a rising or falling edge trigger at EXT5 pin
The 16-bit timer 2 has the following functional components:
-
-
-
-
Clock frequency divider (fxx divided by 1024, 256, 64, 16, 8, 4, 2, 1, fxt) with multiplexer
External clock input pin, EC2 (R06)
I/O pins for capture input, EXT5 (R07) or match output T2O (R07)
16-bit counter (T2CR+T3CR), 16-bit comparator, and 16-bit reference data register
(T2DR+T3DR)
-
-
Timer 2 status and control register (T2SCR)
Timer 2 overflow interrupt and match interrupt generation
October 19, 2009 Ver.1.35
133
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