CMS4A16LAx–75Ex
Figure 1. Initialize and Load Mode Register[1.2.3.]
10 11 12
0
1
2
3
4
5
6
7
8
9
13 14
15
16
17 18
19
CLK
CKE
/CS
/RAS
/CAS
ADDR
Key
Key
Key
RAa
RAa
Key
BA0
BA1
A10/AP
DQ
HiZ
HiZ
/WE
DQM
High level is necessary
tRC
tRP
tRC
Precharge
(All Bank)
Auto
Refresh
Auto
Refresh
Normal
MRS
Extended
MRS
Row Active
a Bank
Note :
1. The two AUTO REFRESH commands at T4 and T9 may be applied before either LOAD MODE REGISTER (LMR) command.
2. PRE = PRECHARGE command, LMR = LOAD MODE REGISTER command, AR = AUTO REFRESH command, ACT = ACTIVE command, RA = Row Address, BA = Bank
Address
3. The Load Mode Register for both MR/EMR and 2 Auto Refresh commands can be in any order; However, all must occur prior to an Active command.
Register Definition
burst (sequential or interleaved), M4-M6 specify the CAS
There are two mode registers which contain settings to
achieve low power consumption. The two registers : Mode
Register and Extended Mode Register are discussed below.
latency, M7 and M8 specify the operating mode, M9 specifies
the width burst mode, M10, M11, M12 and M13 should be set
to zero. The mode register must be loaded when all banks are
idle, and the controller must wait the specified time before ini-
tiating the subsequent operation. Violating either of these
requirements will result in unspecified operation.
Mode Register
The mode register is used to define the specific mode of
operation of the SDRAM. This definition includes the selec-
tion of a burst length, a burst type, a CAS latency, an operat-
ing mode and a write burst mode, as shown in Table 1. The
mode register is programmed via the LOAD MODE REGIS-
TER command and will retain the stored information until it is
programmed again or the device loses power. Mode Register
bits M0-M2 specify the burst length, M3 specifies the type of
Burst Length
Read and write accesses to the SDRAM are burst oriented. The
burst length is programmable, as shown in Table 2. The burst
length determines the maximum number of column locations
that can be accessed for a given READ or WRITE command.
Burst lengths of 1,2, 4, or 8 locations are available for both the
7
Rev. 0.5, May. ‘07
FIDELIX [ FIDELIX ]
