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NDS332P 参数 Datasheet PDF下载

NDS332P图片预览
型号: NDS332P
PDF下载: 下载PDF文件 查看货源
内容描述: P沟道逻辑电平增强模式场效应晶体管 [P-Channel Logic Level Enhancement Mode Field Effect Transistor]
分类和应用: 晶体小信号场效应晶体管开关光电二极管PC
文件页数/大小: 6 页 / 81 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Maximum Continuous Source Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -0.42 A
(Note 2)
-0.75
-0.42
-1.2
A
V
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
P
D
(t) =
T
J
−T
A
R
θJA
(t)
=
T
J
−T
A
R
θJC
+R
θCA
(t)
=
I
2
(t) ×
R
DS(ON)@T
J
D
Typical R
θ
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250
o
C/W when mounted on a 0.02 in
2
pad of 2oz copper.
b. 270
o
C/W when mounted on a 0.001 in
2
pad of 2oz copper.
1a
1b
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS332P Rev. E