Power-Up/Power-Down Sequence
Fairchild translators offer an advantage in that either
VCC may be powered up first. This benefit derives from
the chip design. When either VCC is at 0V, outputs are
in a high-impedance state. The control input (/OE) is
designed to track the VCCA supply. A pull-up resistor
tying /OE to VCCA should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up or power-down. The size of the
pull-up resistor is based upon the current-sinking
capability of the device driving the /OE pin.
The recommended power-down sequence is:
1. Drive /OE input HIGH to disable the device.
2. Remove power from either VCC
.
3. Remove power from the other VCC.
Pull-Up/Pull-Down Resistors
Do not use pull-up or pull-down resistors. This device
has bus-hold circuits: pull-up or pull-down resistors are
not recommended because they interfere with the
output state. The current through these resistors may
exceed the hold drive, II(HOLD) and/or II(OD) bus-hold
currents. The bus-hold feature eliminates the need for
extra resistors.
The recommended power-up sequence is:
1. Apply power to the first VCC
.
2. Apply power to the second VCC
.
3. Drive the /OE input LOW to enable the device.
© 2010 Fairchild Semiconductor Corporation
FXMA108 • Rev. 1.0.1
www.fairchildsemi.com
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