XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
TABLE 69: DATA
L
INK
CONTROL REGISTER
R
EGISTER 52
IT
D
ATA
L
INK
C
ONTROL EGISTER 2 (DLCR2)
R
HEX ADDRESS: 0X0143
B
F
UNCTION
T
YPE
D
EFAULT
DESCRIPTION-OPERATION
2
Tx_IDLE
R/W
0
Transmit Idle (Flag Sequence Byte)
Configures the Tx HDLC2 controller to transmit a string of Flag
Sequence octets (0X7E) in the data link channel to the Remote ter-
minal.
0 = Tx HDLC2 Controller resumes transmitting data to the Remote
terminal
1 = Tx HDLC2 Controller transmits a string of Flag Sequence bytes.
NOTE
:
This bit-field is ignored if the Tx HDLC2 controller is
operating in the BOS Mode - bit-field 0(MOS/BOS) within
this register is set to 0.
1
Tx_FCS_EN
R/W
0
Transmit LAPD Message with FCS
Configure HDLC2 Controller to include/not include FCS octets in the
outbound LAPD message frames.
0 = Does not include FCS octets into the outbound LAPD message
frame.
1 = Inserts FCS octets into the outbound LAPD message frame.
NOTE: This bit-field is ignored if the transmit HDLC2 controller has
been configured to operate in the BOS mode.
0
MOS/BOS
R/W
0
Message Oriented Signaling/Bit Oriented Signaling Select
Specifies whether the TxRx HDLC2 Controller will be transmitting
and receiving LAPD message frames (MOS) or Bit Oriented Signal
(BOS) messages.
0 = Tx/Rx HDLC2 Controller transmits and receives BOS messages.
1 = Tx/Rx HDLC2 Controller transmits and receives MOS mes-
sages.
TABLE 70: TRANSMIT
D
ATA
L
INK
B
YTE
COUNT REGISTER
R
EGISTER 53
IT
T
RANSMIT
D
ATA
L
INK
B
YTE OUNT
C
R
EGISTER 2 (TDLBCR2)
HEX ADDRESS: 0X0144
B
F
UNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7
BUFAVAL//BUFSEL
R/W
0
Transmit HDLC2 Buffer Available/Buffer Select
Specifies which of the two Tx HDLC2 Buffers that the Tx HDLC2
controller should read from to generate the next outbound HDLC2
message.
0 = transmits message data residing in Tx HDLC2 Buffer 0.
1 = transmits message data residing in Tx HDLC2 buffer 1.
N
OTE: If one of these Tx HDLC2 buffers contain a message which
has yet to be completely read-in and processed for
transmission by the Tx HDLC2 controller, then this bit-field
will automatically reflect the value corresponding to the
available buffer. Changing this bit-field to the in-use buffer is
not permitted.
77
EXAR [ EXAR CORPORATION ]
