XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
TABLE 64: RECEIVE
S
A
4 REGISTER
Register 47
R
ECEIVE
S
A
4 REGISTER (RSA4R)
0x013B
B
IT
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7-0 RxSa4[7:0]
RO
11111111 Sa4
The content of this register stores the received Sa4 bits if
RxSa4ENB (register 0x010Ch) is 1.
Bit 7 is received in frame 2 of the CRC-4 multiframe, bit 6 is in frame
4, etc.
TABLE 65: RECEIVE
SA5 REGISTER
Register 48
R
ECEIVE 5 REGISTER (RSA5R)
S
A
0x013C
B
IT
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7-0 RxSa5[7:0]
RO
11111111 Sa5
The content of this register stores the received Sa5 bits if
RxSa5ENB (register 0x010Ch) is 1.
Bit 7 is received in frame 2 of the CRC-4 multiframe, bit 6 is in frame
4, etc.
TABLE 66: RECEIVE
SA6 REGISTER
R
EGISTER 49
R
ECEIVE
S
A
6 REGISTER (RSA6R)
0X013D
B
IT
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7-0 RxSa6[7:0]
RO
11111111 Sa6
The content of this register stores the received Sa6 bits if
RxSa6ENB (register 0x010Ch) is 1.
Bit 7 is received in frame 2 of the CRC-4 multiframe, bit 6 is in frame
4, etc.
TABLE 67: RECEIVE
SA7 REGISTER
R
EGISTER 50
R
ECEIVE
S
A7 REGISTER (RSA7R)
0X013E
B
IT
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7-0 RxSa7[7:0]
RO
11111111 Sa7
The content of this register stores the received Sa7 bits if
RxSa7ENB (register 0x010Ch) is 1.
Bit 7 is received in frame 2 of the CRC-4 multiframe, bit 6 is in frame
4, etc.
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