XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 68: RECEIVE
SA8 REGISTER
R
EGISTER 51
R
ECEIVE
S
A8 REGISTER (RSA8R)
0X013F
B
IT
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7-0 RxSa8[7:0]
RO
11111111 Sa8
The content of this register stores the received Sa8 bits if
RxSa8ENB (register 0x010Ch) is 1.
Bit 7 is received in frame 2 of the CRC-4 multiframe, bit 6 is in frame
4, etc.
TABLE 69: DATA
L
INK
CONTROL REGISTER
R
EGISTER 52
IT
D
ATA
L
INK
C
ONTROL EGISTER 2 (DLCR2)
R
HEX ADDRESS: 0X0143
B
F
UNCTION
T
YPE
D
EFAULT
DESCRIPTION-OPERATION
7
SLC-96
R/W
0
SLC
®
96 Enable, 6 bit for ESF
96 framing is selected, setting this bit high will enable
®96 data link transmission; Otherwise, the regular SF framing
If SLC
SLC
®
bits are transmitted.
In ESF framing mode, setting this bit high will cause facility data link
to transmit/receive SLC®96-like message.
6
MOSA
R/W
0
MOS Abort Enable/Disable Select
This Read/Write bit-field is used to configure the transmit HDLC2
controller to automatically transmit an abort sequence anytime it
transitions from the MOS mode to the BOS mode.
0 = Transmit HDLC2 Controller inserts an MOS abort sequence if
the MOS message is interrupted
1 = Prevents Transmit HDLC2 Controller from inserting an MOS
abort sequence.
5
4
Rx_FCS_DIS
R/W
R/W
0
0
Receive FCS Verification Disable
Enables/Disables Receive HDLC2 Controller’s computation and
verification of the FCS value in the incoming LAPD message frame
0 = Verifies FCS value of each MOS frame.
1 = Does not verify FCS value of each MOS frame.
AutoRx
Auto Receive LAPD Message
Configures the Rx HDLC2 Controller to discard any incoming LAPD
Message frame that exactly match which is currently stored in the
Rx HDLC2 buffer.
0 = Disabled
1 = Enables this feature.
3
Tx_ABORT
R/W
0
Transmit ABORT
Configures the Tx HDLC2 Controller to transmit an ABORT
sequence (string of 7 or more consecutive 1’s) to the Remote termi-
nal.
0 = Tx HDLC2 Controller operates normally
1 = Tx HDLC2 Controller inserts an ABORT sequence into the data
link channel.
76