XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
FIGURE 37. DS1 TRANSMIT OVERHEAD INPUT INTERFACE TIMING IN ESF FRAMING FORMAT MODE
7.1.3
Configure the DS1 Transmit Overhead Input Interface module as source of the Signaling
Framing (Fs) bits in N or SLC®96 framing format mode
The Fs bits in SLC®96 and N framing format mode can be inserted from:
•
•
•
DS1 Transmit Overhead Input Interface Block
DS1 Transmit HDLC Controller
DS1 Transmit Serial Input Interface.
The Transmit Data Link Source Select bits of the Transmit Data Link Select Register (TDLSR) controls the
insertion of data link bits into the Fs bits in N or SLC®96 framing format mode. The table below shows
configuration of the Transmit Data Link Source Select bits of the Transmit Data Link Select Register (TDLSR).
TRANSMIT DATA LINK SELECT REGISTER (TDLSR) (ADDRESS = 0X010AH)
B
IT
B
IT
N
AME
B
IT
TYPE
BIT DESCRIPTION
N
UMBER
1-0
Transmit Data Link
Source Select
R/W
00 - The Signaling Framing bits are inserted into the framer through either
the LAPD controller or the SLC®96 buffer.
01 - The Signaling Framing bits are inserted into the framer through the
Transmit Serial Data input Interface via the TxSer_n pins.
10 - The Signaling Framing bits are inserted into the framer through the
Transmit Overhead Input Interface via the TxOH_n pins.
11 - The Signaling Framing bits are forced to one by the framer.
If the Transmit Data Link Source Select bits of the Transmit Data Link Select Register are set to 10, the
Transmit Overhead Input Interface Block becomes input source of the Fs bits.
172
EXAR [ EXAR CORPORATION ]
