XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
T
ABLE 162: MICROPROCESSOR
R
EGISTER #703, BIT
D
D
ESCRIPTION - GLOBAL
R
R
EGISTER 3
D1
D0
Reserved
Reserved
This Bit Is Not Used.
This Bit Is Not Used.
R/W
R/W
0
0
TABLE 163: MICROPROCESSOR
R
EGISTER #704, BIT
ESCRIPTION - GLOBAL
EGISTER 4
R
EGISTER ADDRESS
R
EGISTER
YPE
R
VALUE
ESET
0x0FE9h
Bit #
D7
N
AME
FUNCTION
T
Reserved
Reserved
Reserved
Reserved
This Bit Is Not Used.
This Bit Is Not Used.
This Bit Is Not Used.
This Bit Is Not Used.
Clock Select Input
R/W
R/W
R/W
R/W
R/W
0
0
0
0
D6
D5
D4
D3
D2
D1
D0
CLKSEL3
CLKSEL2
CLKSEL1
CLKSEL0
0
0
0
0
CLKSEL[3:0] is used to select the input clock source to be
used as the internal timing reference for MCLKIN.
“0000” = 2.048MHz
“0001” = 1.544MHz
“0010” = 8kHz
“0011” = 16kHz
“0100” = 56kHz
“0101” = 64kHz
“0110” = 128kHz
“0111” = 256kHz
“1000” = 4.096MHz
“1001” = 3.088MHz
“1010” = 8.192MHz
“1011” = 6.176MHz
“1100” = 16.384MHz
“1101” = 12.352MHz
“1110” = 2.048MHz
“1111” = 1.544MHz
137