XRT83SL28
xr
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
TRANSMITTER SECTION
NAME
PIN
TYPE
DESCRIPTION
TPOS7
TPOS6
TPOS5
TPOS4
TPOS3
TPOS2
TPOS1
TPOS0
70
67
I
TPOS/TDATA Input
Transmit digital input pin. In dual rail mode, this pin is the transmit positive
data input. In single rail mode, this pin is the transmit non-return to zero (NRZ)
data input.
114
111
39
42
139
142
TNEG7
TNEG6
TNEG5
TNEG4
TNEG3
TNEG2
TNEG1
TNEG0
71
68
I
Transmit Negative Data Input
In dual rail mode, this pin is the transmit negative data input. In single rail
mode, this pin can be tied to ground.
113
110
38
41
140
143
TTIP7
TTIP6
TTIP5
TTIP4
TTIP3
TTIP2
TTIP1
TTIP0
78
84
97
103
31
25
12
6
O
Transmit Differential Tip Output
TTIP is the positive differential output to the line interface. Along with the
TRING signal, these pins should be coupled to a 1:2 step up transformer for
proper operation.
TRING7
TRING6
TRING5
TRING4
TRING3
TRING2
TRING1
TRING0
80
82
99
101
29
27
10
8
O
Transmit Differential Ring Output
TRING is the negative differential output to the line interface. Along with the
TTIP signal, these pins should be coupled to a 1:2 step up transformer for
proper operation.
CONTROL FUNCTION
NAME
PIN
TYPE
DESCRIPTION
ICT
35
I
In Circuit Testing
When this pin is tied "Low", all output pins are forced to "High" impedance for
in circuit testing.
NOTE: Internally pulled "High" with a 50KΩ resistor.
MCLK
17
I
Master Clock Input
This pin is used as the internal reference to the LIU. This clock must be
2.048MHz +/-50ppm.
8
EXAR [ EXAR CORPORATION ]
