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EM68C16CWQG-18IH 参数 Datasheet PDF下载

EM68C16CWQG-18IH图片预览
型号: EM68C16CWQG-18IH
PDF下载: 下载PDF文件 查看货源
内容描述: [64M x 16 bit DDRII Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 60 页 / 1276 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
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EtronTech  
EM68C16CWQG  
Table 27. Electrical Characteristics and Recommended A.C. Operating Conditions  
(VDD = 1.8V 0.1V, TOPER = -40~95 C)  
-18I  
-25I  
-3I  
Specific  
Notes  
Symbol  
Parameter  
Unit  
Min.  
5
Max.  
7.5  
Min.  
5
Max.  
Min.  
5
Max.  
CL=3  
CL=4  
CL=5  
CL=6  
CL=7  
8
8
8
8
ns 15, 33, 34  
ns 15, 33, 34  
ns 15, 33, 34  
ns 15, 33, 34  
ns 15, 33, 34  
3.75  
3
7.5  
3.75  
2.5  
2.5  
-
3.75  
3
7.5  
8
8
tCK(avg)  
Average clock period  
2.5  
7.5  
8
3
8
1.875  
0.48  
0.48  
7.5  
-
-
-
0.52  
0.52  
0.48  
0.48  
0.52  
0.52  
0.48  
0.48  
0.52  
0.52  
tCK  
tCK  
tCK  
34, 35  
34, 35  
tCH(avg)  
tCL(avg)  
WL  
Average clock HIGH pulse width  
Average Clock LOW pulse width  
RL-1  
RL-1  
RL-1  
Write command to DQS associated clock edge  
DQS latching rising transitions to associated  
clock edges  
-0.25  
0.25  
-0.25  
0.25  
-0.25  
0.25  
tCK  
28  
28  
tDQSS  
0.2  
0.2  
-
0.2  
0.2  
-
0.2  
0.2  
-
tCK  
tCK  
tCK  
tCK  
tCK  
tCK  
tDSS  
DQS falling edge to CK setup time  
DQS falling edge hold time from CK  
DQS input HIGH pulse width  
DQS input LOW pulse width  
Write preamble  
-
-
-
tDSH  
0.35  
0.35  
0.35  
0.4  
-
-
0.35  
0.35  
0.35  
0.4  
-
-
0.35  
0.35  
0.35  
0.4  
-
-
tDQSH  
tDQSL  
tWPRE  
tWPST  
-
-
-
0.6  
0.6  
0.6  
10  
Write postamble  
5, 7, 9,  
22, 27  
0.125  
0.2  
-
-
-
-
-
0.175  
0.25  
0.6  
-
-
-
-
-
0.2  
0.275  
0.6  
-
-
-
-
-
ns  
ns  
tCK  
ns  
ns  
tIS(base) Address and Control input setup time  
tIH(base) Address and Control input hold time  
5, 7, 9,  
23, 27  
Control & Address input pulse width for each  
input  
0.6  
tIPW  
6-8, 20,  
26, 29  
0
0.05  
0.125  
0.1  
tDS(base) DQ & DM input setup time  
tDH(base) DQ & DM input hold time  
6-8, 21,  
26, 29  
0.075  
0.175  
0.35  
-
0.35  
-0.4  
-0.35  
-
-
0.35  
-0.45  
-0.4  
-
-
tCK  
ns  
ns  
tDIPW  
tAC  
tDQSCK  
tHZ  
DQ and DM input pulse width for each input  
DQ output access time from CK, CK#  
-0.35  
0.35  
0.4  
0.35  
0.45  
0.4  
38  
38  
-0.325  
-
0.325  
tAC(max)  
DQS output access time from CK, CK#  
Data-out high-impedance time from CK, CK#  
tAC(max)  
tAC(max) ns  
18, 38  
DQS(DQS#) low-impedance time from CK,  
CK#  
DQ low-impedance time from CK, CK#  
DQS-DQ skew for DQS and associated DQ  
signals  
tAC(min) tAC(max) tAC(min) tAC(max) tAC(min) tAC(max) ns  
2tAC(min) tAC(max) 2tAC(min) tAC(max) 2tAC(min) tAC(max) ns  
18, 38  
18, 38  
13  
tLZ(DQS)  
tLZ(DQ)  
tDQSQ  
-
0.175  
-
-
0.2  
-
-
0.24  
-
ns  
min  
(tCH,tCL  
min  
(tCH,tCL  
min  
(tCH,tCL)  
ns 11, 12, 35  
tHP  
CK half pulse width  
)
)
-
0.25  
-
0.3  
-
0.34  
ns  
ns  
tCK  
tCK  
ns  
ns  
tCK  
ns  
ns  
12, 36  
37  
tQHS  
tQH  
DQ hold skew factor  
tHP -tQHS  
-
tHP -tQHS  
-
tHP -tQHS  
-
DQ/DQS output hold time from DQS  
Read preamble  
0.9  
1.1  
0.9  
1.1  
0.9  
1.1  
19, 39  
19, 40  
4, 30  
4, 30  
tRPRE  
tRPST  
tRRD  
tFAW  
tCCD  
tWR  
0.4  
0.6  
0.4  
0.6  
0.4  
0.6  
Read postamble  
10  
-
-
-
-
-
-
-
-
-
-
-
-
10  
-
-
-
-
-
-
-
-
-
10  
-
-
-
-
-
-
-
-
-
Active to active command period  
Four Activate Window  
45  
45  
50  
2
2
2
CAS# to CAS# command delay  
Write recovery time  
15  
15  
15  
30  
WR + tRP  
WR + tRP  
WR + tRP  
14, 31  
tDAL  
Auto Power write recovery + precharge time  
Internal Write to Read Command Delay  
Internal read to precharge command delay  
CKE minimum pulse width  
7.5  
7.5  
7.5  
ns 3, 24, 30  
tWTR  
tRTP  
tCKE  
tXSNR  
tXSRD  
tXP  
7.5  
7.5  
7.5  
ns  
tCK  
ns  
3, 30  
25  
3
tRFC+10  
200  
3
3
tRFC+10  
200  
2
3
tRFC+10  
200  
2
30  
Exit self refresh to non-read command delay  
Exit self refresh to a read command  
Exit precharge power down to any command  
Exit active power down to read command  
-
-
-
-
-
-
tCK  
tCK  
tCK  
3
2
2
1
tXARD  
Rev. 1.2  
26  
Apr. /2016  
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