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EM68C16CWQG-18IH 参数 Datasheet PDF下载

EM68C16CWQG-18IH图片预览
型号: EM68C16CWQG-18IH
PDF下载: 下载PDF文件 查看货源
内容描述: [64M x 16 bit DDRII Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 60 页 / 1276 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
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EtronTech  
EM68C16CWQG  
ODT (On Die Termination)  
On Die Termination (ODT) is a feature that allows a DRAM to turn on/off termination resistance for each DQ,  
UDQS/UDQS#, LDQS/LDQS#, UDM, and LDM signal via the ODT control pin. The ODT feature is designed to  
improve signal integrity of the memory channel by allowing the DRAM controller to independently turn on/off  
termination resistance for any or all DRAM devices.  
The ODT function is supported for ACTIVE and STANDBY modes. It is turned off and not supported in SELF  
REFRESH mode.  
Figure 5. Functional representation of ODT  
VDDQ  
VDDQ  
VDDQ  
SW1  
SW2  
SW3  
Rval1  
Rval2  
Rval3  
DRAM  
Input  
Input  
pin  
Buffer  
Rval1  
SW1  
Rval2  
SW2  
Rval3  
SW3  
VSSQ  
VSSQ  
VSSQ  
Switch (sw1, sw2, sw3) is enabled by ODT pin.  
Selection among sw1, sw2, and sw3 is determined by Rtt (nominal)in EMR.  
Termination included on all DQs, DM, DQS, and DQS# pins  
Table 11. ODT DC Electrical Characteristics  
Parameter/Condition  
Symbol  
Min.  
Nom.  
Max.  
Unit Note  
Rtt effective impedance value for EMRS(A6,A2)=0,1;75Ω  
Rtt effective impedance value for EMRS(A6,A2)=1,0;150Ω  
Rtt effective impedance value for EMRS(A6,A2)=1,1;50Ω  
Ω
Ω
Ω
%
Rtt1(eff)  
Rtt2(eff)  
Rtt3(eff)  
60  
120  
40  
75  
150  
50  
-
90  
180  
60  
6
1
1
1
2
Rtt mismatch tolerance between any pull-up/pull-down pair Rtt(mis)  
-6  
NOTE 1: Measurement Definition for Rtt(eff): Apply VIH (ac) and VIL (ac) to test pin separately, then measure  
current I(VIH(ac)) and I(VIL(ac)) respectively.  
V (ac) V (ac)  
IH  
IL  
Rtt(eff)=  
I(V (ac))-I(V (ac))  
IH  
IL  
NOTE 2: Measurement Definition for Rtt (mis): Measure voltage (VM) at test pin (midpoint) with no load.  
2xVM  
VDDQ  
Rtt(mis)=  
1 100%  
Rev. 1.2  
15  
Apr. /2016