EtronTech
EM68C16CWQG
Off-chip drive (OCD) impedance adjustment
DDR2 SDRAM supports driver calibration feature and the following flow chart is an example of sequence.Every
calibration mode command should be followed by “OCD calibration mode exit” before any other command being
issued.All MR should be programmed before entering OCD impedance adjustment and ODT (On Die Termination)
should be carefully controlled depending on system environment.
Figure 4. OCD impedance adjustment sequence
Before entering OCD impedance adjustment, all MR should be programmed and
ODT should be carefully controlled depending on system environment
Start
EMRS:OCD calibration mode exit
EMRS:Drive(1)
EMRS:Drive(0)
DQ &DQS HIGH;DQS# LOW
DQ &DQS LOW;DQS# HIGH
ALL OK
ALL OK
Test
Test
EMRS:OCD calibration mode exit
EMRS:Enter Adjust Mode
EMRS:OCD calibration mode exit
EMRS:Enter Adjust Mode
BL=4 code input to all DQs
Inc, Dec, or NOP
BL=4 code input to all DQs
Inc, Dec, or NOP
EMRS:OCD calibration mode exit
EMRS:OCD calibration mode exit
EMRS:OCD calibration mode exit
End
Rev. 1.2
13
Apr. /2016
ETRON [ ETRON TECHNOLOGY, INC. ]
