Et r on Tech
EM669325
4M x 32 LPSDRAM
Figure 9.1. Random Column Read (Page within same Bank)
(Burst Length=4, CAS# Latency=1)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK1
CKE
CS#
RAS#
CAS#
WE#
BA0,1
A10
RAz
RAw
RAw
CAw
CAy
RAz
CAz
A0~A11
DQM
CAx
Hi-Z
DQ
Aw0 Aw1 Aw2
Aw3Ax0
Ax1
Ay1Ay2 Ay3
Az1Az2 Az3
Ay0
Az0
Activate
Command
Bank A
Read
Command Comm and
Bank A Bank A
Read
Precharge
Read
Command
Command
Bank A
Bank A
Activate
Command
Bank A
Read
Comm and
Bank A
Preliminary
31
Rev 0.6
Sep. 2003