EtronTech
EM638325
2Mega x 32 SDRAM
Figure 24.3. Precharge Termination of a Burst
(Burst Length=4, 8 or Full Page, CAS# Latency=3)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK3
High
CKE
CS#
RAS#
CAS#
WE#
BS0,1
RAz
RAx
RAy
RAy
A10
CAy
RAz
RAx
CAx
A0~A9
tWR
tRP
tRP
DQM
DQ
Ay0 Ay1 Ay2
DAx0 DAx1
Precharge
Command
Bank A
Read
Command
Bank A
Precharge
Command
Bank A
Activate
Command
Bank A
Precharge Termination
of a Read Burst
Activate
Command
Bank A
Write
Command
Bank A
Activate
Command
Bank A
Write Data
ismasked
Precharge Termination
of a Write Burst
Preliminary
71
Rev 1.4
Oct. 2005
ETRON [ ETRON TECHNOLOGY, INC. ]
