EtronTech
EM638325
2Mega x 32 SDRAM
Figure 20. Byte Write Operation (Burst Length=4, CAS# Latency=2)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK2
High
CKE
CS#
RAS#
CAS#
WE#
BS0,1
RAx
A10
A0~A9
LDQM
RAx
CAy
CAx
CAz
UDQM
DQ0 - DQ7
DAy2
DAy1
Az1 Az2
Ax0 Ax1 Ax2
Ax1
Ax2
Ax3
Az1 Az2 Az3
DAy0 DAy1
DAy3
DQ8 - DQ15
Az0
Upper 3 Bytes
Read
Activate
Command
Bank A
Write
Command
Bank A
Lower Byte
is masked
Upper 3 Bytes Read
are masked Command
Bank A
Lower Byte
is masked
Lower Byte
is masked
are masked
Command
Bank A
Preliminary
65
Rev 1.4
Oct. 2005