EtronTech
EM638325
2Mega x 32 SDRAM
Figure 21. Random Row Read (Interleaving Banks)
(Burst Length=2, CAS# Latency=1)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
CS#
tCK1
High
Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto Begin Auto
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
Precharge
Bank B
Precharge
Bank A
RAS#
CAS#
WE#
BS0,1
RAu
RBx
RBu
RBw
RAw
RAx
RBz
RBv
RBv
RAv
RBy
RAy
RAz
A10
CBu RAu CAu
CAv
CBw RAw
CBx
t
RBx
RBu
CBv
t
RAv
CAw
t
RAx CAx
RBy CBy
RAy CAy RBz
CBz RAz
RBw
A0~A9
t
t
t
t
t
t
t
RP
RP
RP
RP
RP
RP
RP
RP
RP
RP
DQM
Bu0
Bu1 Au0
Au1
Bv0 Bv1
Av0
Av1 Bw0 Bw1
Activate
Aw0 Aw1Bx0 Bx1
Ax0 Ax1 By0
By1 Ay0 Ay1
Bz0
DQ
Activate
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Activate
Command
Bank A
Activate
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank A
Command
Bank A
Command
Bank B
Command
Bank B
Read
Bank B
with Auto
Precharge
Read
Read
Read
Read
Read
Read
Read
Read
Read
Read
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Bank A
with Auto
Precharge
Bank B
with Auto
Precharge
Preliminary
66
Rev 1.4
Oct. 2005
ETRON [ ETRON TECHNOLOGY, INC. ]
