EtronTech
EM636165-XXI
1M x 16 SDRAM
Figure 14.1. Interleaving Column Read Cycle
(Burst Length=4, CAS# Latency=1)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
tCK1
CS#
RAS#
CAS#
WE#
A11
A10
RAx
RAx
RBw
RBw CBw
CBy
RAx
CBx
CAy
CBz
A0~A9
tRCD
tAC1
DQM
DQ
Hi-Z
Bz2 Bz3
Ax0 Ax1 Ax2
Ax3 Bw0 Bw1 Bx0 Bx1 By0
By1 Ay0
Ay1 Bz0
Read
Bz1
Activate
Command
Bank A
Activate
Command
Bank B
Read
Command
Bank B
Read
Command
Bank B
Read
Command
Bank A
Precharge
Precharge
Command
Bank B
Command Command
Bank B
Bank A
Read
Read
Command
Bank A
Command
Bank B
Preliminary
48
Rev. 1.1 Apr. 2005
ETRON [ ETRON TECHNOLOGY, INC. ]
