ESMT
M52D128168A
Mode Register Set Cycle
Extended Mode Register Set Cycle
0
1
2
3
4
5
6
0
1
2
3
4
5
6
C L O C K
C K E
C S
C L O C K
C K E
C S
H I G H
HI G H
* N o t e 2
* N o t e 2
R A S
R A S
* N o t e 1
* N o t e 3
* N o t e 1
* N o t e 3
C A S
C A S
A D D R
A D D R
K e y
R a
K e y
R a
B A 1
B A 0
A 1 0
D Q
B A 1
B A 0
B S
B S
B S
B S
A 1 0
HI - Z
H I - Z
DQ
W E
W E
D Q M
D Q M
Ne w
Co m m a n d
Ne w
Co m m a n d
M R S
E M RS
: Don 't C a re
All banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
MODE REGISTER SET CYCLE
*Note: 1. CS , RAS , CAS , & WE activation at the same clock cycle with address key will set internal
mode register.
2. Minimum 2 clock cycles should be met before new RAS activation.
3. Please refer to Mode Register Set table.
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2009
Revision: 1.3 44/48
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
