M32L1632512A
Page Write Cycle at Different Bank @ Burst Length =4
1
2
3
9
10
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12
13
14
15
16
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18
19
0
6
8
4
5
7
C L O C K
H I GH
C K E
C S
R A S
C A S
RAa Key
CA a RB b
C Ac
CBb
CBd
A D D R
A10
A9
RAa
RB b
tC D L
W E
D SF
DQ M
DAa2 DAa3 DBb0
DAc 0 D Ac 1
DAc 3
DBd0 DBd1 DBd2 D Bd3
M as k
DAa0
DBb1 DBb2 D Bb3
DAc 2
DAa1
D Q
W ri t e
( B- Bank )
M as ked W r i t e
wi th aut o
W ri te w i th aut o
Pr ech arge
Row Ac t i v e
( B- Ban k )
Load M as k
R egis t er
pr echar ge
( A- Ban k )
( B- Bank )
Mas ked W r i t e
( A- Bank)
Row Ac t i ve w i t h
W r i t e- Per - Bi t
enable
: Don't C ar e
(A- Bank)
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6 41/54
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
