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M13S32321A-6BG2G 参数 Datasheet PDF下载

M13S32321A-6BG2G图片预览
型号: M13S32321A-6BG2G
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 1MX32, 0.7ns, CMOS, PBGA144, FBGA-144]
分类和应用: 动态存储器双倍数据速率内存集成电路
文件页数/大小: 48 页 / 1146 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
M13S32321A (2G)  
Read with Auto Precharge (@ BL=8)  
0
1
2
3
4
5
6
7
8
9
10  
C L K  
C L K  
H I G H  
C K E  
C S  
R A S  
C A S  
B A  
A8 /AP  
A D DR  
( A 0 ~ A 7, A 9)  
C a  
R a  
W E  
A u t o p r e c h a r g e s t a r t  
R P  
t
N o t e 1  
D Q S ( C L = 2 )  
D Q ( C L = 2 )  
Q a 4 Q a 5  
Q a 7  
Q a 2  
Qa 6  
Q a 1  
Q a 3  
Q a 0  
D Q S ( C L = 2 . 5 )  
D Q ( C L = 2 . 5 )  
Q a 4 Qa 5  
Qa 6 Q a 7  
Q a 2 Q a 3  
Q a 1  
Q a 0  
D M  
C O M M A N D  
ACTIVE  
READ  
:
D o n ’ t c a r e  
11 1 0 1 B 3 2 R . A  
Note: 1. The row active command of the precharge bank can be issued after tRP from this point.  
The new read/write command of another activated bank can be issued from this point.  
At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Aug. 2012  
Revision : 1.0 34/48  
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