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F49L160UA_1 参数 Datasheet PDF下载

F49L160UA_1图片预览
型号: F49L160UA_1
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 2M ×8 / 1M ×16 ) 3V只有CMOS闪存 [16 Mbit (2M x 8/1M x 16) 3V Only CMOS Flash Memory]
分类和应用: 闪存
文件页数/大小: 51 页 / 459 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
F49L160UA/F49L160BA  
Operation Temperature condition -40°C~85°C  
The system can determine the status of the erase  
operation. The Sector Erase command sequence  
should be reinitiated once the device has returned to  
reading array data, to ensure the data integrity.  
operation by using DQ7, DQ6, DQ2, or RY/  
. See  
BY  
“Write Operation Status” section for more information  
on these status bits.  
When the Embedded Erase algorithm is complete, the  
device returns to reading array data and addresses are  
no longer latched. The system can determine the  
status of the erase operation by using DQ7, DQ6,  
When the Embedded Erase algorithm is complete, the  
device returns to reading array data and addresses are  
no longer latched. See the Erase/Program Operations  
tables in “AC Characteristics” for parameters.  
DQ2, or RY/  
. (Refer to “Write Operation Status”  
BY  
section for more information on these status bits.)  
Refer to the Erase/Program Operations tables in the  
“AC Characteristics” section for parameters.  
Sector Erase Command  
Sector erase is a six-bus cycle operation. The sector  
erase command sequence is initiated by writing two  
unlock cycles, followed by a set-up command. Two  
additional unlock write cycles are then followed by the  
address of the sector to be erased, and the sector  
erase command.  
Sector Erase Suspend/Resume Command  
The Erase Suspend command allows the system to  
interrupt a sector erase operation and then read data  
from, or program data to, any sector not selected for  
erasure (The device “erase suspends” all sectors  
selected for erasure.). This command is valid only  
during the sector erase operation, including the 50 µs  
time-out period during the sector erase command  
sequence. The Erase Suspend command is ignored if  
written during the chip erase operation or Embedded  
Program algorithm. Addresses are “don’t-cares” when  
writing the Erase Suspend command as shown in  
Table 5.  
The device does not require the system to preprogram  
the memory prior to erase. The Embedded Erase  
algorithm automatically programs and verifies the  
sector for an all zero data pattern prior to electrical  
erase. The system is not required to provide any  
controls or timings during these operations.  
After the command sequence is written, a sector erase  
time-out of 50 µs begins. During the time-out period,  
additional sector addresses and sector erase  
commands may be written. Loading the sector erase  
buffer may be done in any sequence, and the number  
of sectors may be from one sector to all sectors. The  
time between these additional cycles must be less than  
50 μs, otherwise the last address and command might  
not be accepted, and erasure may begin.  
When the Erase Suspend command is written during a  
sector erase operation, the device requires a maximum  
of 20 µs to suspend the erase operation. However,  
when the Erase Suspend command is written during  
the sector erase time-out, the device immediately  
terminates the time-out period and suspends the erase  
operation.  
It is recommended that processor interrupts be disabled  
during this time to ensure all commands are accepted.  
The interrupts can be re-enabled after the last Sector  
Erase command is written. If the time between  
additional sector erase commands can be assumed to  
be less than 50 µs, the system need not monitor DQ3.  
Reading at any address within erase-suspended  
sectors produces status data on DQ7–DQ0. The  
system can use DQ7, or DQ6 and DQ2 together, to  
determine if  
a sector is actively erasing or is  
erase-suspended. See “Write Operation Status”  
section for more information on these status bits.  
Any command other than Sector Erase or Erase  
Suspend during the time-out period resets the device to  
reading array data. The system must rewrite the  
command sequence and any additional sector  
addresses and commands.  
After an erase-suspended program operation is  
complete, the system can once again read array data  
within non-suspended sectors. The system can  
determine the status of the program operation using  
the DQ7 or DQ6 status bits, just as in the standard  
program operation. See “Write Operation Status” for  
more information.  
The system can monitor DQ3 to determine if the sector  
erase timer has timed out. (See the “DQ3: Sector Erase  
Timer” section.) The time-out begins from the rising  
The system may also write the auto-select command  
sequence when the device is in the Erase Suspend  
mode. The device allows reading auto-select codes  
even at addresses within erasing sectors, since the  
codes are not stored in the memory array. When the  
device exits the auto-select mode, the device reverts to  
the Erase Suspend mode, and is ready for another  
valid operation.  
edge of the final WE pulse in the command  
sequence.  
Once the sector erase operation has begun, only the  
Erase Suspend command is valid. All other commands  
are ignored. Note that a hardware reset during the  
sector erase operation immediately terminates the  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Jan. 2008  
Revision: 1.4  
14/51  
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