S1D15E06 Series
Write
A0
WR
Latch
DATA
White
N
N+1
N+2
Command
N
N+1
N+2
BUS Holder
Write Signal
Read
A0
WR
RD
DATA
Read
Dumy
n
n+1
Command
Read Signal
Column Address
Bus Holder
Preset N
Read command code
Increment N+1
n
N+2
n+1
n+2
Dummy Read
Data Read
Data Read
Fig. 6.2
RAM bit data (high order and low order)
6.2 Display data RAM
6.2.1 Display Data RAM
(1,1) : gray-scale 3
Black (when display is in
normal mode)
This is a RAM to store the display dot data, and comprises
132 × 160 × 2 bits. Access to the desired bit is enabled
by specifying the page address and column address.
When the 4 gray-scale is selected by the Display Mode
command, display data input for gray-scale display are
processed as a two-bit pair. Combination is as follows:
(1,0) : gray-scale 2
(0,1) : gray-scale 1
(0,0) : gray-scale 0
White (when display is in
normal mode)
When binary display is selected by the Display Mode
command, the RAM 1 bit built in the one-dot pixel
responds to it. When the RAM bit data is “1”, the
display is black. If it is “0”, the display is given in white.
RAM bit data
(MSB, LSB) = (D1,D0), (D3,D2), (DS,D4), (D7,D6)
When the RAM bit data is gray-scale 1 and 2, gray-scale
display is realized according to the parameter of the
Gray-scale Pattern Set command.
“1” : Light On
Black (when display is in
normal mode)
“0” : Light Off
White (when display is in
normal mode)
Rev. 2.1
EPSON
13
EPSON [ EPSON COMPANY ]
