Epson Research and Development
Page 15
Vancouver Design Center
4.2 S1D13506 Hardware Configuration
The S1D13506 latches MD15 through MD0 to allow selection of the bus mode and other
configuration data on the rising edge of RESET#. For details on configuration, refer to the
S1D13506 Hardware Functional Specification, document number X25B-A-001-xx.
The table below shows only those configuration settings important to the PC Card Host Bus
Interface.
Table 4-1: Summary of Power-On/Reset Options
value on this pin at rising edge of RESET# is used to configure:(1/0)
S1D13506
Pin Name
1
0
MD[3:1]
MD4
111 = PC Card Host Bus Interface selected
Little Endian
Big Endian
MD5
WAIT# is active high (1 = insert wait state)
WAIT# is active low (0 = insert wait state)
MD11
MD12
Alternate Host Bus Interface Selected
BUSCLK input divided by two
Primary Host Bus Interface Selected
BUSCLK input not divided by two
MD15
WAIT# is floating if S1D13506 is not selected
WAIT# is always driven
= configuration for PC Card Host Bus Interface
4.3 Performance
The S1D13506 PC Card Interface specification supports a BCLK up to 50MHz, and
therefore can provide a high performance display solution.
Interfacing to the PC Card Bus
Issue Date: 01/02/06
S1D13506
X25B-G-005-03
EPSON [ EPSON COMPANY ]
