EN25QH32
Table 9. Parameter ID (0) (Advanced Information) 6/9
Address (h)
Description
Address
(Bit)
Data
Comment
(Byte Mode)
Reserved. These bits default to all 1’s
45h : 44h
15 : 00
16
FFh
Reserved
17
(2-2-2) Fast Read Number of Wait states
(dummy clocks) needed before valid
output
00000b
Not Supported
18
19
20
21
22
46h
000b
FFh
Not Supported
Not Supported
(2-2-2) Fast Read Number of Mode Bits
23
(2-2-2) Fast Read Opcode
Opcode for dual input opcode & address
and dual output data Fast Read.
47h
31 : 24
Table 9. Parameter ID (0) (Advanced Information) 7/9
Address (h)
Address
(Bit)
Description
(Byte Mode)
Data
Comment
Reserved. These bits default to all 1’s
49h : 48h
15 : 00
16
FFh
Reserved
17
(4-4-4) Fast Read Number of Wait states
(dummy clocks) needed before valid
output
00100b
4 dummy clocks
8 mode bits
18
19
20
21
22
4Ah
010b
EBh
(4-4-4) Fast Read Number of Mode Bits
23
(4-4-4) Fast Read Opcode
Must Enter EQPI
Mode Firstly
Opcode for quad input opcode/address,
quad output data Fast Read.
4Bh
31 : 24
Table 9. Parameter ID (0) (Advanced Information) 8/9
Address (h)
Address
(Bit)
Description
(Byte Mode)
Data
Comment
4Ch
4Dh
4Eh
4Fh
07 : 00
15 : 08
23 : 16
31 : 24
0Ch
20h
00h
FFh
4 KB
Sector Type 1 Size
Sector Type 1 Opcode
Sector Type 2 Size
Sector Type 2 Opcode
Not Supported
Not Supported
Table 9. Parameter ID (0) (Advanced Information) 9/9
Address (h)
Description
Address
(Bit)
Data
Comment
(Byte Mode)
50h
51h
52h
53h
07 : 00
15 : 08
23 : 16
31 : 24
10h
D8h
00h
FFh
64 KB
Sector Type 3 Size
Sector Type 3 Opcode
Sector Type 4 Size
Sector Type 4 Opcode
Not Supported
Not Supported
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc., www.eonssi.com
49
Rev. E, Issue Date: 2012/01/30