EN25D16
Figure 10. Fast Read Instruction Sequence Diagram
Dual Output Fast Read (3Bh)
The Dual Output Fast Read (3Bh) is similar to the standard Fast Read (0Bh) instruction except that
data is output on two pins, DO and DI, instead of just DO. This allows data to be transferred from the
EN25D16 at twice the rate of standard SPI devices. The Dual Output Fast Read instruction is ideal
for quickly downloading code from to RAM upon power-up or for applications that cache code-
segments to RAM for execution.
Similar to the Fast Read instruction, the Dual Output Fast Read instruction can operation at the
highest possible frequency of FR (see AC Electrical Characteristics). This is accomplished by
adding eight “dummy clocks after the 24-bit address as shown in figure 11. The dummy clocks allow
the device’s internal circuits additional time for setting up the initial address. The input data during
the dummy clock is “don’t care”. However, the DI pin should be high-impedance prior to the falling
edge of the first data out clock.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
16
Rev. B, Issue Date: 2008/06/23
EON [ EON SILICON SOLUTION INC. ]
