EM6603
11.2 SWB Interactive send mode
In interactive SWB mode the reloading of the data transmission register SWBbuff is performed by the
application program. This means that it is possible to have an unlimited length transmission data stream.
However, since the application program is responsible for reloading the data a continuous data stream can only
be achieved at 1kHz or 2kHz transmission speeds. For the higher transmission speeds a series of writes must
be programmed and the serial output clock will not be continuous.
Serial transmission using the interactive mode is detailed in Figure 14. Programming of the SWB in interactive
is achieved in the following manner:
Select the transmission clock speed using the bits ClkSW0 and ClkSW1 in the ClkSWB register.
Load the first nibble of data into the SWB data register SWBbuff
Start serial transmission by selecting the bit StSWB in the register HighSWB register.
Once the data has been transferred into the serial transmission register a non maskable interrupt (SWBEmpty)
is generated and TESTvar[3] goes high. The CPU goes in the interrupt routine, with the JPV3 as first instruction
in the routine one can immediately jump to the SWB update routine to load the next nibble to be transmitted into
the SWBuff register. If this reload is performed before all the serial data is shifted out then the next nibble is
automatically transmitted. This is only possible at the transmission speeds of 1KHz or 2KHz due to the number
of instructions required to reload the register. At the higher transmission speeds of 8khz and 16khz the
application must restart the serial transmission by writing the StSWB in the High SWBHigh register after writing
the next nibble to the SWBbuff register.
Each time the SWBuff register is written the "SWBbuffer empty interrupt" and TestVar[3] are cleared to "0".
For proper operation the SWBuff register must be written before the serial clock drops to low during sending
the last bit (MSB) of the previous data.
Figure 14.Interactive Serial Write Buffer transmission
After loading the last nibble in the SWBbuff register a new interrupt is generated when this data is transferred
to an intermediate Shift Register. Precaution must be made in this case because the SWB will give repetitive
interrupts until the last data is sent out completely and the STSWB bit goes low automatically. One possibility to
overcome this is to check in the Interrupt subroutine that the STSWB bit went low before exiting interrupt. Be
careful because if STSWB bit is cleared by software transmission is stopped immediately.
At the end of transmission a dummy write of SWBuff must be done to clear TESTvar[3] and "SWBbuffer
empty interrupt" or the next transmission will not work.
03/02 REV. G/439
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