EM78P510N
8-Bit Microcontrollers
6.12.5 SPI Mode Timing
Fig. 6-24 SPI Mode with /SS Disabled
The SCK edge is selected by programming bit CES. The waveform shown in Fig.6-24
is applicable regardless of whether the EM78P510N is in master or slave mode with
/SS disabled. However, the waveform in Fig.6-25 can only be implemented in slave
mode with /SS enabled.
Fig. 6-25 SPI Mode with /SS Enabled
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Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)