EM78P510N
8-Bit Microcontrollers
Note:
1. The Priority of PA4/SEG4/SI Pin
PA4/SEG4/SI Pin Priority
Medium
SEG4
High
Low
SI
PA4
2. The Priority of PA5/SEG5/SO Pin
PA5/SEG5/SO Pin Priority
Medium
SEG5
High
Low
SO
PA5
3. The Priority of PA6/SEG6/SCK Pin
PA6/SEG6/SCK Pin Priority
High
Medium
Low
SCK
SEG6
PA6
4. The Priority of PA7/SEG7//SS PIN
PA7/SEG7//SS Pin Priority
High
Medium
Low
/SS
SEG7
PA7
6.12.4 Programming the Related Registers
Registers for the SPI Circuit
R_BANK Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bank 2
Bank 2
Bank 2
Bank 2
BANK 0
Bank 0
0X0C
0X0D
0X0E
0X0F
0x0E
0x0F
SPIS
SPIC
SPIR
SPIW
IMR
DORD
R/W
TD1
R/W
SPIE
R/W
TD0
R/W
SRO
R/W
-
OD3
OD4
-
RBF
-
R/W
R/W
-
R
CES
R/W
SSE
R/W
SDOC SBRS2 SBRS1 SBRS0
R/W R/W R/W R/W
SRB7 SRB6 SRB5 SRB4 SRB3 SRB2 SRB1 SRB0
R/W R/W R/W R/W R/W R/W R/W R/W
SWB7 SWB6 SWB5 SWB4 SWB3 SWB2 SWB1 SWB0
R/W
T1IE
R/W
T1IF
R/W
R/W
R/W
R/W
SPIE URTIE EXIE9 EXIE8
R/W R/W R/W R/W
SPIIF URTIF EXIF9 EXIF8
R/W R/W R/W R/W
R/W
R/W
R/W
R/W
TCIE
R/W
TCIF
R/W
LVDIE ADIE
R/W
LVDIF
R/W
R/W
ADIF
R/W
ISR
As the SPI mode is defined, the related registers of this operation are shown.
Related Control Registers of the SPI Mode
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1 Bit 0
Bank 2
0x0D
SPIC
CES
SPIE
SRO
SSE
SDOC
SBR2
SBR1 SBR0
Bank 0
0x0E
IMR
T1IE LVDIE
ADIE
SPIE
URTIE EXIE9 EXIE8 TCIE
SPIC: SPI Control Register
Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)
• 81