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EM78P510NAM 参数 Datasheet PDF下载

EM78P510NAM图片预览
型号: EM78P510NAM
PDF下载: 下载PDF文件 查看货源
内容描述: 8位OTP微 [8-Bit Microprocessor with OTP ROM]
分类和应用: OTP只读存储器
文件页数/大小: 116 页 / 2156 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P510N  
8-Bit Microcontrollers  
6.13.1 Timer Mode  
In Timer mode, counting down is performed using the internal clock. The down-counter  
value auto reloads from T1PD. When the contents of the down-counter underflows,  
interrupt is generated and the counter is cleared. Counting down resumes after the  
counter is cleared.  
6.13.2 T1OUT Mode  
In Timer 1 underflow Output mode, counting down is performed using the internal clock  
with prescaler or External clock through T1CLK Pin or Sub Frequency with prescaler.  
The counter value is loaded from T1PD, when the counter underflows. The F/F output  
is toggled and the counter is auto-reloaded from T1PD, each time an overflow is found.  
The F/F output is inverted and output to /T1OUT pin. This mode can generate 50%  
duty pulse output. The program can initialize the F/F and it is initialized to “0” during a  
reset. A T1OUT interrupt is generated each time the /T1OUT output is toggled.  
Fig 6-27 T1OUT Mode Timing Chart  
6.13.3 Capture Mode  
In Capture mode, the pulse width, period and duty of the T1CAP input pin are  
measured in this mode, which can be used in decoding the remote control signal. The  
counter is free running by the internal clock. On the rising (falling) edge of T1CAP pin  
input, the contents of the counter is loaded into T1PD, then the counter is cleared and  
interrupt is generated. On the falling (rising) edge of T1CAP pin input, the contents of  
the counter are loaded into T1TD. The counter is still counting, on the next rising edge  
of the T1CAP pin input, the contents of the counter are loaded into T1PD, counter is  
cleared and interrupt is generated again. If an overflow occurs before the edge is  
detected, the 00H is loaded into T1PD and an underflow interrupt is generated. During  
interrupt processing, it can be determined whether or not there is an overflow by  
checking whether the T1PD value is 00H. After an interrupt (capture to T1PD or  
overflow detection) is generated, capture and underflow detection are halted until  
T1PD is read out.  
86 •  
Product Specification (V0.9) 09.12.2006  
(This specification is subject to change without further notice)  
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