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EM78P510NAM 参数 Datasheet PDF下载

EM78P510NAM图片预览
型号: EM78P510NAM
PDF下载: 下载PDF文件 查看货源
内容描述: 8位OTP微 [8-Bit Microprocessor with OTP ROM]
分类和应用: OTP只读存储器
文件页数/大小: 116 页 / 2156 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P510N  
8-Bit Microcontrollers  
Bits 6~5 (TD1~TD0): SDO Status Output Delay Times Options  
TD1  
0
TD0  
0
Delay Time  
8 CLK  
0
1
16 CLK  
24 CLK  
32 CLK  
1
0
1
1
Bit 4:  
Reserved  
Bit 3 (OD3): Open-Drain Control Bit  
1 : Open-drain enable for SDO  
0 : Open-drain disable for SDO  
Bit 2 (OD4): Open-Drain Control bit  
1 : Open-drain enable for SCK  
0 : Open-drain disable for SCK  
Bit 1:  
Reserved  
Bit 0 (RBF): Read Buffer Full Flag  
1 : Receiving completed, and SPIRB is fully exchanged.  
0 : Receiving not completed, and SPIRB has not fully exchanged.  
6.2.35 Bank 2 RD SPIC (SPI Control Register)  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
CES  
SPIE  
SRO  
SSE  
SDOC  
SBRS2  
SBRS1  
SBRS0  
Bit 7 (CES): Clock Edge Select Bit  
0 : Data shift out on rising edge, and shifts in on falling edge. Data is on  
hold during low-level.  
1 : Data shift out falling edge, and shift in on rising edge. Data is on hold  
during high-level.  
Bit 6 (SPIE): SPI Enable Bit  
0 : Disable SPI mode  
1 : Enable SPI mode  
Bit 5 (SRO): SPI Read Overflow Bit  
0 : No overflow  
1 : A new data is received while the previous data is still being held in the  
SPIRB register. In this situation, the data in SPIS register will be  
destroyed. To avoid setting this bit, user is required to read the SPIRB  
register although only the transmission is implemented. This can only  
occur in slave mode.  
Product Specification (V0.9) 09.12.2006  
(This specification is subject to change without further notice)  
27  
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