EM78P350N
8-Bit Microprocessor with OTP ROM
P83/BO pin
TEN
P83/BO pin
Fig.6-3 Tone Output Pin Timing Chart
Bit 3 ~ Bit 0: Unimplemented, read as ‘0’
6.1.27 Bank 2 R7 (System Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
T1S
T2S
T3S
“0”
“0”
“0”
“0”
IDLE
Bit 7: Timer 1 Clock source
0 = Timer 1 source is used as Main Clock
1 = Timer 1 source is used as Sub clock
Bit 6: Timer 2 Clock Source
0 = Timer 2 source is used as Main Clock
1 = Timer 2 source is used as Sub clock
Bit 5: Timer 3 Clock Source
0 = Timer 3 source is used as Main Clock
1 = Timer 3 source is used as Sub clock
Bit 4 ~ Bit 1: Unimplemented, read as ‘0’
Bit 0 (IDLE): select idle mode or sleep mode
IDLE = “0” + SLEP Instruction: sub-oscillator (Fs), Fs = 32.768kHz (idle
mode). In idle mode, only the sub-oscillator acting as Timer 1, 2, 3
sources, and CPU is halted.
IDLE = “1”+SLEP Instruction: all oscillation stop (sleep mode). In this
mode, main-oscillator (Fm) and Fs is not work simultaneously.
IDLE = “0” + SLEP Instruction → idle mode
IDLE = “1” + SLEP Instruction → sleep mode
NOP Instruction must be added after Sleep instruction.
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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