EM78P350N
8-Bit Microprocessor with OTP ROM
6.1.26 Bank 2 R6 (BOCON: Buzzer Output Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TEN
TCK1
TCK0
FSCS
“0”
“0”
“0”
“0”
Bit 4 (FSCS): High or low frequency select in Function operating
0 = High
1 = Low
Bit 5~Bit 6 (TCK0~TCK1): Keytone output clock source select
Keytone Output
Frequency
Clock source
TCK1
TCK0
Normal
FSCS=0 FSCS=1
Slow,
Idle
Fc=8M
Fs=32.768K
0
0
1
1
0
1
0
1
Fc/(213)
Fc/(212)
Fc/(211)
Fc/(210)
Fs/(25)
Fs/(24)
Fs/(23)
Fs/(22)
Fs/(25)
Fs/(24)
Fs/(23)
Fs/(22)
0.976kHz
1.953kHz
3.906kHz
7.812kHz
1.024kHz
2.048kHz
4.096kHz
8.192kHz
Bit 7 (TEN): Key_tone enable control.
0 = Disable
1 = Enable
output latch
output enable
data output
Q
D
/BO pin
13
5
,
fs/2
fc/2
12
4
3
,
fc/2
fs/2
fs/2
fs/2
11
MUX
fc/2
,
2
10
fc/2
,
TEN
TCK
2
TBKTC
Fig. 6-2 Buzzer Output Pin Configuration
Key tone output can generate 50% duty pulse for driving a piezo-electric buzzer. The
P83 must be set to “1” before the keytone is enabled, it can be halted by setting P83 to
“0”.
18 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
