EM78P350N
8-Bit Microprocessor with OTP ROM
6.7.2 The T and P Status under Status Register
A reset condition is initiated by one of the following events:
1. Power-on reset
2. /RESET pin input "low"
3. WDT time-out (if enabled)
The values of T and P as listed in the table below, are used to check how the processor
wakes up.
Reset Type
T
P
Power-on
1
*P
1
1
*P
0
/RESET during Operating mode
/RESET wake-up during Sleep mode
WDT during Operating mode
0
*P
0
WDT wake-up during Sleep mode
Wake-up on pin change during Sleep mode
0
1
0
*P: Previous status before reset
The following shows the events that may affect the status of T and P.
Event
T
P
Power-on
1
1
0
1
1
1
1
WDTC instruction
WDT time-out
SLEP instruction
*P
0
Wake-up on pin changed during Sleep mode
0
*P: Previous value before reset
6.8 Interrupt
The EM78P350N has seven interrupts as listed below:
1. TCC overflow interrupt
2. Port 6 Input Status Change Interrupt
3. External interrupt [(P52, /INT0), (P53, /INT1) pin]
4. Analog-to-Digital conversion completed
5. When TMR1/TMR2 matches with PRD1/PRD2/PRD3 respectively in PWM
6. When the comparators output changes (for EM78P350N only)
7. Completion of Serial interface transmit/receive
Before the Port 6 Input Status Change Interrupt is enabled, reading Port 6 (e.g., "MOV
R6, R6") is necessary. Each Port 6 pin will have this feature if its status changes. Any
pin configured as output, including the P52 (/INT0), and P53 (/INT1), is excluded from
this function. Port 6 Input Status Change Interrupt will wake up the EM78P350N from
sleep mode if it is enabled prior to going into sleep mode by executing SLEP. When
wake-up occurs, the controller will continue to execute the succeeding program if the
global interrupt is disabled. If enabled, it will branch out to the interrupt vector 008H.
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
