EM78P350N
8-Bit Microprocessor with OTP ROM
6.9 Analog-to-Digital Converter (ADC)
The analog-to-digital circuitry consists of an 8-bit analog multiplexer; three control
registers (AISR/R8, ADCON/R9, & ADOC/RA), three data registers (ADDATA1/RB,
ADDATA1H/RC, & ADDATA1L/RD) and an ADC with 12-bit resolution as shown in the
functional block diagram below. The analog reference voltage (Vref) and the analog
ground are connected via separate input pins.
The ADC module utilizes successive approximation to convert the unknown analog
signal into a digital value. The result is fed to the ADDATA, ADDATA1H and
ADDATA1L. Input channels are selected by the analog input multiplexer via the
ADCON register bits.
ADC7
ADC6
ADC5
ADC4
Vref
Power-Down
ADC
Start to Convert
( successive approximation )
ADC3
ADC2
ADC1
ADC0
Fsco
4-1
MUX
Internal RC
7
~
0
2
1
0
3
4
3
11 10
9
8
7
6
5
4
3
2
1
0
6
5
ADCON
ADCON
ADCON
DATA BUS
RF
AISR
ADDATA1H
ADDATA1L
Fig. 6-9 Analog-to-Digital Conversion Functional Block Diagram
6.9.1 ADC Control Register (AISR/Bank 2 R8, ADCON/ Bank 2 R9,
ADOC/ Bank 2 RA)
6.9.1.1 Bank 2 R8 (AISR: ADC Input Select Register)
Bit 7
Bit 6
ADE7
0
Bit 5
ADE6
0
Bit 4
ADE5
0
Bit 3
ADE4
0
Bit 2
ADE3
0
Bit 1
ADE2
0
Bit 0
ADE1
0
Symbol
*Init_Value
*Init_Value: Initial value at power-on reset
The AISR register individually defines the Port 6 pins as analog inputs or as digital I/O.
Bit 7 (ADE7): AD converter enable bit of P67 pin
0 = Disable AIN7, P67 functions as I/O pin
1 = Enable AIN7 to function as analog input pin
Bit 6 (ADE6): AD converter enable bit of P66 pin
0 = Disable AIN6, P66 functions as I/O pin
1 = Enable AIN6 to function as analog input pin
Bit 5 (ADE5): AD converter enable bit of P65 pin
0 = Disable AIN5, P65 functions as I/O pin
1 = Enable AIN5 to function as analog input pin
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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