EM78P350N
8-Bit Microprocessor with OTP ROM
Reset Type
Bit Name
Address
Name
Bit 7
“0”
0
Bit 6
“0”
0
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PRD3[1] PRD3[0] PRD2[1] PRD2[0] PRD1[1] PRD1[0]
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
RB
(Bank 1)
0XB
/RESET & WDT
0
0
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Bit Name
DT1[9] DT1[8] DT1[7] DT1[6] DT1[5] DT1[4] DT1[3] DT1[2]
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RC
(Bank 1)
0XC
0XD
0xE
0xF
0X6
0X7
0x8
/RESET & WDT
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Bit Name
DT2[9] DT2[8] DT2[7] DT2[6] DT2[5] DT2[4] DT2[3] DT2[2]
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RD
(Bank 1)
/RESET & WDT
Wake-up from
Pin change
P
P
P
P
P
0
P
P
Bit Name
DT3[9] DT3[8] DT3[7] DT3[6] DT3[5] DT3[4] DT3[3] DT3[2]
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RE
(Bank 1)
/RESET & WDT
Wake-up from
Pin change
P
P
P
P
P
0
P
P
Bit Name
-
-
DT3[1] DT3[0] DT2[1] DT2[0] DT1[1] DT1[0]
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RF
(Bank 1)
/RESET & WDT
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Bit Name
TEN
TCK1
TCK0 FSCS
“0”
0
“0”
0
“0”
0
“0”
0
Power-on
0
0
0
0
0
0
0
0
R6
(BOCR,
Bank 2)
/RESET & WDT
0
0
0
0
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Bit Name
T1S
T2S
T3S
“0”
0
“0”
0
“0”
0
“0”
0
CPUS
Power-on
0
0
0
0
0
0
1
1
R7
(SCR,
Bank 2)
/RESET & WDT
0
0
0
0
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Bit Name
ADE7 ADE6 ADE5 ADE4 ADE3 ADE2 ADE1 ADE0
Power-on
R8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(AISR,
Bank 2)
/RESET & WDT
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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