EM78P350N
8-Bit Microprocessor with OTP ROM
Reset Type
Bit Name
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TMR2H[9] TMR2H[8] TMR2H[7] TMR2H[6] TMR2H[5] TMR2H[4] TMR2H[3] TMR2H[2]
Power-on
RE
(TMR2H,
Bank 3)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0xE
/RESET & WDT
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Bit Name
“0”
0
“0’
0
TMR3[1] TMR3[0] TMR2[1] TMR2[0] TMR1[3] TMR1[2]
Power-on
0
0
1
1
0
0
1
1
0
0
1
1
RF(TMRL,
Bank 3)
0xF
/RESET & WDT
0
0
Wake-up from
Pin change
P
P
P
P
P
P
P
P
Bit Name
Power-on
-
-
-
-
-
-
-
-
U
U
U
U
U
U
U
U
0x10 ~
0x3F
/RESET and
WDT
R10 ~ R3F
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
Wake-up from
Pin change
Legend: “–” = not used
“u” = unknown or don’t care
“P” = previous value before reset
“t” = check “Reset Type” Table in Section 6.5.2
6.7.1.3 Controller Reset Block Diagram
VDD
D
Q
CLK
Oscillator
CLK
CLR
Power-On Reset
Voltage Detector
WTE
WDT Timeout
WDT
Reset
Setup time
/RESET
Fig. 6-7 Controller Reset Block Diagram
62 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)