EM78P350N
8-Bit Microprocessor with OTP ROM
Bit 4 (ADE4): AD converter enable bit of P64 pin
0 = Disable AIN4, P64 functions as I/O pin
1 = Enable AIN4 to function as analog input pin
Bit 3 (ADE3): AD converter enable bit of P63 pin
0 = Disable AIN3, P63 functions as I/O pin
1 = Enable AIN3 to function as analog input pin
Bit 2 (ADE2): AD converter enable bit of P62 pin
0 = Disable AIN2, P63 functions as I/O pin
1 = Enable AIN2 to function as analog input pin
Bit 1 (ADE1): AD converter enable bit of P61 pin
0 = Disable AIN1, P61 functions as I/O pin
1 = Enable AIN1 to function as analog input pin
Bit 0 (ADE0): AD converter enable bit of P60 pin
0 = Disable AIN0, P60 functions as I/O pin
1 = Enable AIN0 to function as analog input pin
NOTE
The P60/AIN0 pin priority is as follows:
P60/ADE0 Priority
High
AIN0
Low
P60
6.9.1.2 Bank 2 R9 (ADCON: ADC Control Register)
Bit
Bit 7
VREFS
0
Bit 6
CKR1
0
Bit 5
CKR0
0
Bit 4
Bit 3
Bit 2
ADIS2
0
Bit 1
ADIS1
0
Bit 0
ADIS0
0
Symbol
ADRUN ADPD
*Init_Value
0
0
*Init_Value: Initial value at power on reset
The ADCON register controls the operation of the AD conversion and determines
which pin should be currently active.
Bit 7(VREFS): The input source of the ADC Vref
0 = The ADC Vref is connected to Vdd (default value), and the
P84/VREF pin carries out the function of P84.
1 = The ADC Vref is connected to P84/VREF.
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Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
