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EM78P350NK 参数 Datasheet PDF下载

EM78P350NK图片预览
型号: EM78P350NK
PDF下载: 下载PDF文件 查看货源
内容描述: 8位OTP微 [8-Bit Microprocessor with OTP ROM]
分类和应用: 局域网OTP只读存储器
文件页数/大小: 110 页 / 1823 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P350N  
8-Bit Microprocessor with OTP ROM  
The table below shows the relationship between Tct and the maximum operating  
frequencies.  
Operation Max. Operation Max. Conversion  
CKR1: CKR0  
Max. Conversion Rate  
Mode  
Fosc/16  
Fosc/4  
Frequency  
4MHz  
1MHz  
16MHz  
-
Rate/Bit  
00  
01  
10  
11  
250kHz (4µs) 15 × 4µs=60µs (16.7kHz)  
250kHz (4µs) 15 × 4µs=60µs (16.7kHz)  
250kHz ( 4µs) 15 × 4µs=60µs (16.7kHz)  
14kHz (71µs) 15 × 71µs=1065µs (0.938kHz)  
Fosc/64  
Internal RC  
NOTE  
Pin not used as an analog input pin can be used as regular input or output pin.  
During conversion, do not perform output instruction to maintain precision for all the  
pins.  
6.9.5 ADC Operation during Sleep Mode  
In order to obtain a more accurate ADC value and reduce power consumption, the AD  
conversion remains operational during sleep mode. As the SLEP instruction is  
executed, all the MCU operations will stop except for the Oscillator, TCC, Timer 1,  
Timer 2, Timer 3, Timer 4 and AD conversion.  
The AD Conversion is considered completed as determined by:  
1. ADRUN bit of R9 register is cleared (“0” value)  
2. Wake-up from AD conversion (where it remains in operation during sleep mode)  
The results are fed into the ADDATA, ADDATA1H, and ADDATA1L registers when the  
conversion is completed. If the ADWE is enabled, the device will wake up. Otherwise,  
the AD conversion will be shut off, no matter what the status of ADPD bit is.  
6.9.6 Programming Process/Considerations  
6.9.6.1 Programming Process  
Follow these steps to obtain data from the ADC:  
1. Write to the 8 bits (ADE7:ADE0) on the Bank 2 R8 (AISR) register to define the  
characteristics of R6 (digital I/O, analog channels, or voltage reference pin).  
2. Write to the Bank 2 R9/ADCON register to configure the AD module:  
a) Select ADC input channel (ADIS2: ADIS0).  
b) Define AD conversion clock rate (CKR1: CKR0).  
c) Select the VREFS input source of the ADC.  
d) Set the ADPD bit to 1 to begin sampling.  
3. Set the ADWE bit, if the wake-up function is employed.  
4. Set the ADIE bit, if the interrupt function is employed.  
5. Write “ENI” instruction, if the interrupt function is employed.  
Product Specification (V 1.0) 09.14.2006  
(This specification is subject to change without further notice)  
69  
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