EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
6.2.21 IOCF1 (Pull-high Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/PH67
/PH66
/PH65
/PH64
/PH63
/PH62
/PH61
/PH60
NOTE
The IOCD0 register is both readable and writable.
Bit 7 (/PH67): Control bit is used to enable the pull-high of the P67 pin.
0 = Enable internal pull-high
1 = Disable internal pull-high
Bit 6 (/PH66): Control bit used to enable the pull-high function of the P66 pin.
Bit 5 (/PH65): Control bit used to enable the pull-high function of the P65 pin.
(Not applicable for EM78P341N)
Bit 4 (/PH64): Control bit used to enable the pull-high function of the P64 pin.
(Not applicable for EM78P341N)
Bit 3 (/PH63): Control bit used to enable the pull-high function of the P63 pin.
(Not applicable for EM78P341N)
Bit 2 (/PH62): Control bit used to enable the pull-high function of the P62 pin.
(Not applicable for EM78P341N)
Bit 1 (/PH61): Control bit used to enable the pull-high function of the P61 pin.
Bit 0 (/PH60): Control bit used to enable the pull-high function of the P60 pin.
6.3 TCC/WDT and Prescaler
There are two 8-bit counters available as prescalers that can be extended to 16-bit
counter for the TCC and WDT respectively. The PST2 ~ PST0 bits of the CONT
register are used to determine the ratio of the TCC prescaler, and the PWR2 ~ PWR0
bits of the IOCE0 register are used to determine the WDT prescaler. The prescaler
counter is cleared by the instructions each time such instructions are written into TCC.
The WDT and prescaler will be cleared by the “WDTC” and “SLEP” instructions. Fig.
6-1 (next page) depicts the block diagram of TCC/WDT.
TCC (R1) is an 8-bit timer/counter. The TCC clock source can be internal clock or
external signal input (edge selectable from the TCC pin). If TCC signal source is from
an internal clock, TCC will be incremented by 1 at every instruction cycle (without
prescaler). Referring to Fig. 6-1, CLK=Fosc/2 or CLK=Fosc/4 is dependent to the Code
Option bit <CLKS>. CLK=Fosc/2 if the CLKS bit is "0," and CLK=Fosc/4 if the CLKS bit
is "1." If the TCC signal source is from an external clock input, TCC will be incremented
by 1 at every falling edge or rising edge of the TCC pin. The TCC pin input time length
(kept at High or Low level) must be greater than 1CLK.
Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
