EM78815
8-Bit Microcontroller
7.5 Reset
The Reset can be caused by:
(1) Power-on voltage detector reset (POVD) and power on reset
(2) WDT time-out (if enabled and in Green or Normal mode)
(3) /Reset pin pull low
NOTE
In Case (1), the POVD is controlled by Code Option. If you enable POVD, the CPU
will reset at 2V and below, thus, the CPU will consume more current, which is 3µA.
The power-on reset circuit is always enabled. It will reset the CPU at 1.4V and
consume 0.5µA.
Once a Reset occurs, the following functions are performed:
The oscillator is running, or will be started
The Program Counter (R2) is set to all "0"
When powered on, the upper 3 bits of R3 and the upper 2 bits of R4 are cleared
The Watchdog timer and prescaler counter are cleared
The Watchdog timer is disabled
The CONT register is set to all "1"
The other register (Bit 7 ~ Bit 0)
IOC
Register
Page 0
IOC
Register
Page 1
R Register
Page 0
R Register
Page 1
R Register R Register
Address
Page 2
Page 3
0000 0000
0000 0000
1
4
--
--
×××× ××××
00×× ××××
×000 0000
×××× ××××
×××× ××××
×××× ××××
×××× ××××
0000 0××0
×××× ××××
×××× ××××
×××× ××××
0000 0000
×××× ××××
×××× ××××
×××× 0000
0000 0000
0000 0000
--
--
×××× ××××
×××× ××××
0000 0000
0000 0000
0000 0000
0000 0000
1111 0000
1111 1111
1111 1111
1111 1111
1111 1111
5
×××× ××××
×××× ××××
×××× ××××
00000000
00000000
6
×××× ××××
×××× ××××
×××× ××××
×××× ××××
×××× ××××
×××× ××××
×××× ××××
×××× ××××
×××× ××××
0000 0000
7
8
×××× 0000
0000 0×××
0000 0000
1111 1111
1111 1111
×××× ××××
×××× ×000
0000 0000
0000 0000
9
A
B
C
D
E
F
×××× ××××
1111 1111
1111 1111
1111 1111
0000 0000
0000 0000
×××× ××××
00×× 0000
0000 0000
0000 0000
×××× ××××
×××× ××××
×××× ××××
×××× ××××
×××× ××××
××00 ××××
0000 0000
0×00 0000
--
00×× 0000
60 •
Product Specification (V2.4) 02.17.2006
(This specification is subject to change without further notice)