EM78815
8-Bit Microcontroller
Instruction
Cycle
Status
Affected
Binary Instruction
Hex
Mnemonic
Operation
R(0-3) → A(4-7)
R(4-7) → A(0-3)
R(0-3) ↔ R(4-7)
R+1 → A, skip if zero
R+1 → R, skip if zero
0 → R(b)
0 0111 00rr rrrr
07rr
SWAPA R
None
1
0 0111 01rr rrrr
0 0111 10rr rrrr
0 0111 11rr rrrr
0 100b bbrr rrrr
0 101b bbrr rrrr
0 110b bbrr rrrr
0 111b bbrr rrrr
07rr
07rr
SWAP R
JZA R
None
None
None
None
None
None
None
1
2 if skip
2 if skip
1
07rr
JZ R
BC R,b
BS R,b
JBC R,b
JBS R,b
0×××
0×××
0×××
0×××
1
1 → R(b)
if R(b)=0, skip
if R(b)=1, skip
2 if skip
2 if skip
PC+1 → [SP]
(Page, k) → PC
1 00kk kkkk kkkk
1kkk
CALL k
None
2
1 01kk kkkk kkkk
1 1000 kkkk kkkk
1 1001 kkkk kkkk
1 1010 kkkk kkkk
1 1011 kkkk kkkk
1 1100 kkkk kkkk
1 1101 kkkk kkkk
1kkk
18kk
19kk
1Akk
1Bkk
1Ckk
1Dkk
JMP k
MOV A,k
OR A,k
None
None
Z
2
1
1
1
1
2
1
(Page, k) → PC
k → A
A ∨ k → A
AND A,k
XOR A,k
RETL k
SUB A,k
Z
A & k → A
Z
A ⊕ k → A
None
Z, C, DC
k → A, [Top of Stack] → PC
k-A → A
PC+1 → [SP]
001H → PC
1 1110 0000 0001
1E01
INT
None
1
1 1110 1kkk kkkk
1 1111 kkkk kkkk
1E8k
1Fkk
PAGE k
ADD A,k
None
1
1
K→R5(4:0)
k+A → A
Z, C, DC
Note: One instruction cycle = 2 main clock
7.9 Code Option Register
The controller has one Code option register which is not part of the normal program
memory. The option bits cannot be accessed during normal program execution.
7.9.1 Code Option Register 1 (Program ROM)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/DED
/POVD
−
−
−
−
−
−
Bit 0 (/POVD) : Power-on Voltage Detector
0/1 → Enable / disable the Voltage Detector
2.2V /POVD Reset
Voltage
2.2V Power-on Reset
Voltage
Sleep Mode Current
(VDD=5V)
/POVD
1
0
No
Yes (2.2V)
No
1µA
Yes (2.2V)
15µA
Bit 1(/DED) : Differential Energy Detect function enable bit
0/1 → Enable / disable DED function
Product Specification (V2.4) 08.01.2004
(This specification is subject to change without further notice)
63
ELAN [ ELAN MICROELECTRONICS CORP ]
