EM78815
8-Bit Microcontroller
Data
Bus
Instruction clock
16.384kHz
M
U
X
M
U
X
SYNC
2 cycles
TCC(R1)
TS
TCC overflow interrupt
PAB
M
U
X
8-bit Counter
WDT
PSR0 ~
PSR2
8-to-1 MUX
MUX
WDTE
PAB
PAB
WDT timeout
Fig. 25 Block Diagram of TCC and WDT
7.3.3 IOC5 Address Automatic Increase/Decrease Control, Data
RAM Data Buffer 2
7.3.3.1 Page 0 Address Automatic Increase/Decrease control register
Bit 7
DA2_ID
R/W-1
Bit 6
DA1_ID
R/W-1
Bit 5
DO_ID
R/W-1
Bit 4
Bit 3
DA2_IDEN DA1_IDEN DO_IDEN
R/W-0 R/W-0 R/W-0
Bit 2
Bit 1
Bit 0
−
×
−
×
Bit 0 :
Undefined register, not for use
Bit 1 (DO_IDEN) : Enable Data ROM address flag Increase/Decrease Enable
Function.
If this bit is set, the Data ROM address will increase or decrease
after accessing (read or write) the Data ROM. When Expanded
Data ROM is used, user can read or write into the external
memory. By controlling RA Page 0 Bit 3, address auto
increase/decrease function can be changed. Refer to RA
Page 0 for detailed description.
1/0 → Enable / Disable
Bit 2 (DA1_IDEN) : Enable Data RAM address Flag 1 (RD and RE register)
Increase/Decrease Enable Function.
If this bit is set, the Data RAM address will increase or decrease
after accessing (read or write) the Data RAM (RC register).
1/0 → Enable / Disable
Product Specification (V2.4) 08.01.2004
(This specification is subject to change without further notice)
49
ELAN [ ELAN MICROELECTRONICS CORP ]
