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EM78808 参数 Datasheet PDF下载

EM78808图片预览
型号: EM78808
PDF下载: 下载PDF文件 查看货源
内容描述: [8-BITMICRO-CONTROLLER]
分类和应用:
文件页数/大小: 63 页 / 469 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78808  
8-bit Micro-controller  
comparator is adjusted accordingly.  
*The reference signal must be between Vss and Vdd.  
*Threshold detector applications may be the same reference.  
*The comparator can operate from the same or different reference source.  
OP outputs  
*The compared result is stored in the OPOUT through a Schmitt trigger.  
Using as an operation amplifier  
The comparator can be used as an operation amplifier, if a feedback resister is connected from the input to the  
output externally.  
Bit 4 (CMPIN1) : Switch for controlling PORT63 as IO PORT or a comparator input.  
0 IO PORT63  
1 comparator input  
Bit5 (CMPIN2) : Switch for controlling PORT64 as IO PORT or a comparator input.  
0 IO PORT64  
1 comparator input  
Bit 6 (CMPIN3) : Switch for controlling PORT65 as IO PORT or a comparator input.  
0 IO PORT65  
1 comparator input  
Bit 7 (CMPREF) : Switch for comparator reference voltage type  
0 internal reference voltage  
1 external reference voltage  
PAGE2 (Energy Detector)  
7
6
5
4
3
2
1
0
VRSEL  
DED  
EDGE  
WUEDD CW_SMB DEDCLK DEDPWR  
DEDTHD  
Bit 0 (DEDTHD) : The minimum detection threshold of Differential Energy Detector (DED)  
0/1 -45dBm/-35dBm  
Bit 1 (DEDPWR) : Power control of Differential Energy Detector (DED)  
0/1 Power off / Power on  
Bit 2 (DEDCLK) : Operating clock for Differential Energy Detector (DED)  
0/1 32.768kHz/3.5826MHz  
This bit is used to select operating clock for Differential Energy Detector (DED). When this bit is set to “1”,  
the PLL is also enabled regardless of RA bit 6 (ENPLL) value. At this time, the Energy detector works at high  
frequency mode. When this bit is set to “0”, the Energy Detector works at low frequency mode. The difference  
between high frequency mode and low frequency is as follows.  
DEDPWR  
0
DEDCLK ENPLL  
Energy detector CLK main CLK  
X
X
X
Decision by  
ENPLL  
Disable  
Enable  
1
1
1
1
0
0
1
1
0
1
0
1
32.768 KHZ  
32.768 KHZ  
3.5826 MHZ  
3.5826 MHZ  
Disable  
Enable  
PS. “X” means don’t care  
Bit 3(CW_SMB) : Call Waiting / short message receiver switch  
0 Short message mode select. ± 5.5% CAS tone accepted frequency range deviation.(Protocol : ± 5%)  
1 Call Waiting mode select. CAS tone accepted frequency range deviation is decided on CODE Option  
Register bit 5 ( 1:for Europe and USA / 0:for China )  
Bit 4 (WUEDD) : Wake-up control of Energy Detector (DED) output data  
1/0 enable/disable  
Bit 5 (EDGE) : Wake-up and interrupt trigging edge control of Energy Detector (DED) output  
1/0 Falling edge trig. / Rising edge and Falling edge trig.  
Bit 6 (DED) : Interrupt mask of DED output data  
0 disable interrupt of DED output data  
______________________________________________________________________________________________________________________________________________________  
* This specification is subject to change without notice.  
8/1/2004 (V3.1)  
42  
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